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3D IC

3D IC

Auteur(s): Siemens Digital Industries Software
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As the semiconductor industry struggles with the limits of Moore’s Law, traditional monolithic scaling is no longer enough to meet performance, power, area and cost demands in technology, design, analysis, and manufacturing. 3D IC by Siemens is your go-to podcast for exploring the cutting-edge world of 3D IC packaging—a revolutionary approach reshaping semiconductor design, system integration, and heterogeneous computing. Join industry leaders, engineers, and innovators as we break down advanced IC packaging solutions like 2.5D/3D IC, FCBGA, FOWLP, and more. Discover how chiplets, multi-die integration, and high-bandwidth memory (HBM) are driving higher performance, lower power consumption, and scalable architectures. In each episode, we dive deep into the challenges and opportunities of IC design and manufacturing, including: Roadmap for advanced packaging and heterogeneous integration in semiconductor scaling Mainstream adoption of 3D IC—key challenges and breakthroughs Optimizing micro-architecture and integration platforms for performance and efficiency Strategic planning of chiplets and interposers for hierarchical device integration Leveraging early predictive multi-physics analysis to enhance design accuracy Automating design and routing for RDL-based fan-out wafer-level packaging (FOWLP) Exploring glass substrates for superior electrical and thermal performance Developing test-vehicles and daisy chain designs for architectural validation Ensuring reliability and manufacturability in 3D IC heterogeneous integration Mastering Signal Integrity (SI) and Power Integrity (PI) Analysis for high-speed systems Managing thermal challenges in stacked die architectures Subscribe now and stay ahead in the world of 3D IC. Learn more: Siemens 3D IC Packaging SolutionsSiemens Digital Industries Software Politique
Épisodes
  • From 2.5D to True 3D IC: What’s Driving the Next Wave of Integration
    Sep 18 2025
    How do you transition from today’s 2.5D systems into tomorrow’s true 3D IC architectures — while balancing cost, performance, and thermal demands? What you’ll learn… Where hyperscalers and AI accelerator developers are leading the 3D IC adoption curve. Why design enablement and ecosystems are still evolving for mainstream adoption. The tipping points that push companies toward 2.5D/3D IC designs. The new methodology requirements: system-centric, predictive, shift-left modeling. Why siloed design teams can’t meet the demands of advanced 3D IC. How Siemens’ portfolio and AE expertise help customers adapt tools, methods, and organizations for success. What you’ll discover… (01:40) Current state of 3D IC adoption: hyperscalers, AI accelerators, and beyond. (04:20) 3D VS 2.5D design and (hybrid bonding, stacking, bridges). (05:30) Why customers want to learn more about 3D IC design. (06:50) Why do customers move over to 3D IC design? (08:25) Challenges in 3D IC design. (10:20) Methodology shifts: early system-level planning and predictive modeling (13:30) Siemens’ broad portfolio, roadmap collaboration, and multi-physics modeling (15:45) The 5-year outlook: chiplet standards, system-on-wafer, and power/thermal battles More about this episode… In this episode of the Siemens 3D IC Podcast, host John McMillan speaks with Kevin Rinebold, 3D IC Packaging and Account Technology Manager at Siemens EDA. With over 35 years of customer-facing experience, Kevin shares insights into the evolution of advanced packaging, chiplet integration, and the methodologies needed for the next wave of 3D IC adoption. The discussion covers how hyperscalers are driving AI and high-performance compute with 2.5D and emerging 3D approaches, why design enablement remains uneven across the supply chain, and what’s required to balance thermal, power, and signal considerations at scale. Kevin emphasizes that 3D IC isn’t just a technical challenge; it’s an organizational shift toward integrated, cross-disciplinary collaboration. He also highlights Siemens’ role in enabling customers to “shift left,” evaluate tradeoffs early, and leverage a broad portfolio of tools and expertise to meet the complexity of future 3D IC designs. Looking ahead, Kevin points to maturing chiplet standards, system-on-wafer architectures, and the ongoing battle to get power in and heat out of dense 3D IC stacks. Ideal for: IC packaging engineers, 3D IC architects, chiplet designers, substrate fabricators, and verification professionals navigating the shift from 2.5D to 3D integration. Connect with John McMillan LinkedIn Website Connect with Kevin Rinebold LinkedIn Website
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    18 min
  • Why Every 3D IC Needs a Test Vehicle Before It Hits Production
    Sep 4 2025
    How do you ensure that cutting-edge 3D IC designs can actually be manufactured before investing millions in production? What you’ll learn… What test vehicles are and why they’re indispensable for validating manufacturability How daisy chain structures pinpoint weaknesses in bumps, balls, and die connections Who builds test vehicles: OSATs, foundries, or customers, and why it matters How test vehicles strengthen collaboration between OEMs and OSATs The hidden value of test vehicles in reliability, regulatory compliance, and risk mitigation Where you’ll find it…. (02:00) What a test vehicle is when it’s needed (03:20) Real-world example: testing embedded chips before mass production (06:00) Who’s responsible for creating test vehicles? (07:20) How do test vehicles factor into the relationship between the OSATs and the OEMs? (09:25) The link between test vehicles and PCB design practices (11:12) Beyond connectivity: heaters, capacitive structures, and stacked vias (15:25) Automotive and regulatory requirements for reliability testing (17:15) Why engineers shouldn’t design daisy chains by hand More about this episode… In this episode of the Siemens 3D IC Podcast, host John McMillan talks with Kendall Hiles, Senior 3D IC Product Specialist at Siemens EDA, about the critical role of test vehicles and daisy chain design tests in semiconductor innovation. Unlike a final product, a test vehicle isn’t built to sell, it’s built to learn. Kendall Hiles explains how test vehicles act as manufacturing “test beds,” enabling engineers to validate new processes and technologies before scaling up to costly production runs. The conversation dives into daisy chain design tests, a clever way of stringing together bumps and balls to measure connectivity and identify failure points with precision. Kendall also highlights when OSATs, foundries, or customers should take ownership of creating test vehicles, and how they factor into collaboration between OEMs and manufacturers. Listeners will also hear why test vehicles are especially vital for automotive reliability and regulatory compliance, and why manual spreadsheet-driven daisy chain design is a risky practice in today’s complex 3D IC world. For anyone working in semiconductor packaging, 3D IC design, or advanced manufacturing, this episode offers practical insight into improving yield, reducing risk, and accelerating innovation. Connect with John McMillan LinkedIn Website Connect with Kendall Hiles LinkedIn Website
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    18 min
  • Breaking Down 50 Million Pins: A Smarter Way to Design 3D IC Packages
    Aug 21 2025
    How do you design and verify a package with tens of millions of pins — without losing months to manual rework? What you’ll learn… Why chiplet-based architectures demand new approaches to IC packaging How hierarchical device planning reduces overwhelming complexity The risks of spreadsheet-based workflows and why they’re no longer viable How early, multi-domain analysis helps avoid costly late-stage redesigns What Siemens’ Innovator 3D IC Portfolio offers for synchronized, error-proof design Where you’ll find it…. (01:50) Current changes in IC Packaging and the impact on the whole ecosystem (03:00) How to manage complexity scaling (03:35) What hierarchical device planning is and why it matters (05:00) How traditional methods fall short for high-pin-count designs (06:20) The risks and consequences of package assembly errors (07:00) What next-gen tools must deliver for designers (09:10) Siemens’ Innovator 3D IC Portfolio overview More about this episode… In this episode of the Siemens 3D IC Podcast, host John McMillan speaks with Per Viklund, Director of IC Packaging and RF Product Lines at Siemens EDA, about the growing challenge of managing chiplet and interposer complexity in advanced 3D IC designs. Per explains how hierarchical device planning enables designers to work at the right level of abstraction, streamlining the creation, optimization, and verification of massive, high-pin-count packages. The discussion covers why spreadsheet-based methods no longer cut it, the risks of unsynchronized workflows, and how early, multi-domain analysis can prevent costly late-stage redesigns. The episode also introduces Siemens’ Innovator 3D IC Portfolio — a unified, AI-infused solution designed to support the entire packaging workflow, from early planning through final layout, with built-in data management to eliminate version errors. Ideal for IC packaging engineers, 3D IC architects, chiplet designers, substrate fabricators, and verification professionals working on high-complexity designs. Connect with John McMillan LinkedIn Website Connect with Per Viklund LinkedIn Website
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    10 min
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